A Flexible Dual-Mode and Efficient RISC-V Coprocessor for On-Node FFT Acceleration in Edge Sensing
Published in IEEE Embedded Systems Letters (ESL), 2025
Recommended citation: Cao, P.; Wang, H.; Cao, H.; Wu, Z.; Liu, Y. (2025). "A Flexible Dual-Mode and Efficient RISC-V Coprocessor for On-Node FFT Acceleration in Edge Sensing." IEEE Embedded Systems Letters. doi:10.1109/LES.2025.3634524.
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